Nonvolatile semiconductor memories use a variety of semiconductor memory cell designs. One type of memory cell uses an electrically isolated floating gate to trap charge. A variety of mechanisms can be used to insert charge onto the floating gate and to pull charge from the floating gate (i.e., “write” to the memory cell). Electron tunneling can be used both to inject charge and to pull charge off the floating gate of a memory cell. Hot electron injection is another mechanism for inserting charge onto a floating gate of a memory cell. Other nonvolatile semiconductor memories use a trapping dielectric to insert or remove charge from between a control gate of a memory cell and the silicon substrate.
A typical prior art memory cell is capable of achieving one of two possible logic states, being either “programmed” or “erased”. In the case of an erasable programmable read only memory (“EPROM”) cell, a select gate is formed above a floating gate within an oxide layer. The oxide layer is further formed above a silicon substrate between a source and a drain. Data is stored in the memory cell by altering the amount of charge on the floating gate. In a case where negative charge is drawn onto the floating gate, electrons in the substrate below the floating gate are repelled. This implies that to form an n-channel in the substrate between the source and drain, a larger positive voltage must be applied to the select gate than is required when the floating gate is not charged. In other words, the threshold voltage Vt of the memory cell is higher when the floating gate is charged. In fact, charging the floating gate causes the drain current vs. gate-source voltage (iD-vGS) characteristic of the memory cell to shift. By measuring the threshold voltage or shifts in the iD-vGS characteristics, the logic state of a memory cell can be “read”.
The above-mentioned methods of writing and reading a memory cell are strictly electrical in nature. To interface these memory devices with optical circuits requires optical-to-electrical and/or electrical-to-optical conversions. Such conversions are inherently inefficient, adding circuit complexity and wasting valuable silicon real estate.